We can also see that the part where the input voltage is increased, the conversion time has also increased. The green bar determines the time taken by the analog to digital converter for one conversion. As it crosses the magnitude of the input voltage, the counter resets and the next conversion begins. It is clearly visible that the output of the counter type digital to analog converter increases until it reaches the input voltage. The following figure shows the typical conversion pattern of the counter type analog to digital converter: The greater the applied voltage the more time the analog to digital converter takes for the analog data conversion. The analog to digital conversion time is dependent on the magnitude of the input voltage. The counter resets for every new conversion i.e the counter starts the counting from zero onwards in every conversion. This is the whole procedure and after completion, again the input voltage is sampled and new conversion initiates. So, we conclude that the latched output is directly proportional to the input voltage. Instead, the low output of the comparator goes to the control circuit which in return latches the output of the counter and the counter gets reset. When the digital to analog converter output voltage is greater than the input voltage the state of the comparator becomes low. As a result, the digital to analog output increases slowly in a staircase manner. When Vin > VdacĪs long as the input voltage is greater than the output DAC voltage, the output of the comparator is high and the counter is provided with the clock pulses to perform counting. This DAC output is constantly compared with the input voltage. Since the counter keeps on incrementing its count, the output of the digital to analog converter also increases in a staircase fashion. Because of this, the counter starts counting. When the output of the comparator is pulled high, the AND gate applies clock pulses to the counter. The comparator is followed by an AND gate which gives clock pulses to the counter for its operation. So, the output of the comparator is high. Initially, the given input voltage is higher than the output DAC voltage which satisfies the condition for the comparator’s high state. Due to this the output of the digital to analog converter also equals zero.
The output of the binary counter is passed as an input to the DAC.Īt the beginning of the conversion, the counter is reset and set to zero. The input voltage is applied at the positive or non-inverting terminal of the comparator while the negative or inverting terminal of the comparator is connected to the output of the digital to analog converter. This section will provide an understanding of the working principle of the concerned analog to digital converter.
Followings are the main components of ramp type analog to digital converter circuit: